GB101: 16 Channel digital receiver
- Interfaces embedded computer systems to analog RF front ends.
- Accepts up to 4 IF/VHF inputs up to 300MHz.
- Samples inputs with 16 bit precision at up to 160MHz.
- Downconvert up to 16 bands of interest using on board GC4016 DDCs.
- Open source signal processing FPGA (Xilinx Kintex 7 XC7K160T) for custom algorithm development.
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High Performance Fundamentals
The GB101 is a digital receiver in PMC form factor, which will interface embedded computing systems to radio equipment at either an intermediate frequency, or at VHF radio frequencies. The card combines high performance ADCs and low jitter clock components with a Xilinx Kintex 7 FPGA and digital down converter ASICs, to produce a high performance low power digital receiver module. It will accept up to four RF/IF inputs through front panel SMA connectors and provide the host system with either digitized versions of the wide band analog input signals, or specific bands of interest down converted to baseband using the on board GC4016s ASICs. The Kintex 7 FPGA (XC7K160T) provides exceptional computational power on very reasonable power and price budgets, making the GB101 an ideal technical refresh for embedded systems built around PCI bus architectures. It will upgrade analog performance and signal processing capability of legacy systems to the state of the art, at a fraction of the cost of system replacement.
Data Conversion
The GB101 is equipped with two Texas Instruments 16DV160 dual ADCs, which digitize the analog inputs with 16 bit resolution, at rates up to 160MHz. Sample clocks for the converters can be generated on board, or an external clock can be provided from the front panel connector. The external clock may be provided at the full sample rate, or the internal clock may be phase locked to a lower frequency, such as a 10MHz system reference clock.
DDC Details
The GC4016 digital down converter ASICs provided on the GB101 can be configured through software to provide 16 channels up to 2.5MHz wide, 8 channels up to 5MHz wide, or four channels up to 10 MHz wide. Although all narrow band outputs must be the same bandwidth, center frequencies of the individual bands may be uniquely programmed, as can the initial phase of the numerically controlled oscillator. DDCs located on multiple cards may be synchronized for phase coherent operations such as beam forming.
FPGA resources
If necessary, additional processing can be performed using the on board Kintex 7 FPGA, using the Hardware Development Kit supplied with the card. The HDK includes all VHDL source code, design documentation, and project files required for the user to continue development from the standard product configuration delivered by BBSP.
Applications information
The GB101 can be directly installed on any single board computer, or carrier card which includes a PMC site. This allows the module to be installed in a VME, cCPI, or VPX system. By using widely available carrier cards, the digital receiver capability can be installed in PCI or PCI Express slots found in desktop or industrial PCs. The dual data path memory architecture of the GB101 allows simultaneous collection of wideband and narrow band data. This is an important feature because it allows the card to support search and track modes of operation concurrently. Any of the wideband analog input data streams can be routed to one FIFO without processing, and at the same time, raw ADC data can be routed through the DDC(s) to isolate signals of interest.