Portfolio of work : Multiple Digital receivers in PMC form factor, equipped with Xilinx V2 to V5 FPGAs
In order to interface single board computers and DSP engines to RF equipment used in spectrum monitoring and signal intercept applications, members of the BBSP team developed a series of digital receivers based on the PMC form factor (IEEE 1386.1). These cards are typically connected to the RF front end equipment using commonly used intermediate frequencies such as 21.4, 70 and 160MHz. The ADC sample rate is software programmable, allowing the user to fine tune it based on the IF frequency and bandwidth provided by the RF front end. Once the wideband inputs are digitized, signals of interest can be isolated using the digital down converter ASICs (GC4016s). The dual FIFO architecture allows simultaneous acquisition of wideband and narrow band signals. This enables the user to capture an IF bandwidth up to 40MHz through one FIFO, while recording narrow band signals using the other FIFO. An open source hardware development kit was provided for the Xilinx FPGA, enabling sophisticated users to install proprietary signal processing algorithms. These cards were extremely successful, and were widely deployed in ground mobile and airborne signal intelligence, spectrum monitoring, and radar applications.